@inproceedings{07eb8c822c5645e5bb314e5338be8c24,
title = "Yield-enhancement techniques for 3D random access memories",
abstract = "Three-dimensional (3D) integration technology using through silicon via (TSV) is an emerging technology for integrated circuit designs. Random access memory (RAM) is one good candidate for using the 3D integration technology. Introducing redundancies into a large-capacity RAM in design phase is essential for yield improvement. In this paper, we present yield-enhancement techniques for 3D RAMs. In addition to typical redundancy schemes are used to improve the yield of 3D RAMs, an inter-die redundancy scheme is proposed. Also, a stacking flow is proposed to further improve the final yield of 3D RAMs with the proposed inter-die redundancy scheme.",
author = "Chou, {Che Wei} and Huang, {Yu Jen} and Li, {Jin Fu}",
year = "2010",
doi = "10.1109/VDAT.2010.5496702",
language = "???core.languages.en_GB???",
isbn = "9781424452712",
series = "Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010",
pages = "104--107",
booktitle = "Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010",
note = "2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010 ; Conference date: 26-04-2010 Through 29-04-2010",
}