VLSI implementation of visual block pattern truncation coding

Yuan Chen Liu, Yeong Kang Lai, Tsung Han Tsai, Po Cheng Wu, Liang Gee Chen

研究成果: 雜誌貢獻期刊論文同行評審

1 引文 斯高帕斯(Scopus)

摘要

The paper proposes a pipelined architecture of visual block pattern truncation coding algorithm to minimize mean square error. Using this chip, the VBPTC based system can be applied to real-time encoding for the moving pictures.

原文???core.languages.en_GB???
頁(從 - 到)490-499
頁數10
期刊IEEE Transactions on Consumer Electronics
44
發行號3
DOIs
出版狀態已出版 - 1998

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