VLSI implementation of anisotropic probabilistic neural network for real-time image scaling

Ching Han Chen, Hsiang Wen Chang, Chia Ming Kuo

研究成果: 雜誌貢獻期刊論文同行評審

3 引文 斯高帕斯(Scopus)

摘要

This study proposes an VLSI implementation of anisotropic probabilistic neural network (APNN) for real-time video processing applications. The APNN interpolation method achieves good sharpness enhancement at edge regions and reveals the noise reduction at smooth region. For real-time applications, the APNN interpolation is further implemented with efficient pipelined very-large-scale integration (VLSI) architecture. The VLSI architecture of APNN has a five-layer structure, which is comprised of Euclidian layer, Gaussian layer, weighting layer, summation layer, and division layer. The VLSI implementation outperforms software with the low-loss quality. The experimental results indicate that the performance of VLSI implementation is competent for image interpolation. The presented VLSI implementation of APNN interpolation method can reach 1920 × 1080 at 30 frames per second (FPS) with a reasonable hardware cost.

原文???core.languages.en_GB???
頁(從 - 到)71-80
頁數10
期刊Journal of Real-Time Image Processing
16
發行號1
DOIs
出版狀態已出版 - 14 2月 2019

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