VLSI design of dual-loop automatic gain control for dual-mode QAM/VSB CATV modem

A digitized automatic gain control (DAGC) whose loop bandwidth can be automatically regulated by a digital quantizer is presented in this paper. The designed quantizer that only costs tens of gates provides the DAGC both wide loop bandwidth for fast acquisition and narrow loop bandwidth for low AGC gain jitter in stable steady-state. The receive bandpass filter, variable gain amplifier (VGA), and digital control circuits have been implemented in VLSI using 0.8 μm CMOS technology. For both 64-QAM and 8-VSB signals, the closed-loop experimental results show that the designed DAGC has input dynamic range from 22 mV_pp to 456 mV_pp, transient mode bandwidth 1 kHz, steady-state band-width 90 Hz, settling time of step response less than 2 ms using 10 MHz clock for digital control chip.