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VLSI design of an SVM learning core on sequential minimal optimization algorithm
Ta Wen Kuan, Jhing Fa Wang,
Jia Ching Wang
, Po Chuan Lin, Gaung Hui Gu
認知智慧與精準健康照護研究中心
資訊工程學系
研究成果
:
雜誌貢獻
›
期刊論文
›
同行評審
57
引文 斯高帕斯（Scopus）
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Keyphrases
Support Vector Machine
100%
VLSI Design
100%
Sequential Minimal Optimization
100%
Support Vector Machine Learning
100%
Sequential Minimal Optimization Algorithm
100%
System-on-chip
50%
Field Programmable Gate Arrays
50%
Systems-based
50%
Integrated Circuit chip
50%
Cyclone
50%
Chip Design
50%
Recognition System
50%
Intellectual Property Core
50%
Altera DE2
50%
Application Specific Integrated Circuits
50%
Computer Science
Support Vector Machine
100%
Optimization Algorithm
100%
Machine Learning
100%
Learning System
100%
Recognition System
33%
Application Specific Integrated Circuit
33%
System on a Chip
33%
Field Programmable Gate Arrays
33%
Engineering
Learning System
100%
Support Vector Machine
100%
Field Programmable Gate Arrays
33%
Intellectual Property Core
33%
Application Specific Integrated Circuit
33%
Chemical Engineering
Learning System
100%
Support Vector Machine
100%