@inproceedings{fd815f2de95b4ec784028bda04c9b2b5,
title = "VLSI design of a very low bit rate speech decoder",
abstract = "This study presents an FBLPC vocoder and an ASIC architecture for its decoding process. The FBLPC vocoder is based a forward-backward waveform prediction, and the required bit rate is approximately 1.2 kbps. Regarding the ASIC decoder, dedicated architectures are devised for the separate decoding modules. These architectures are then integrated through resource-sharing to achieve a cost effective design.",
keywords = "ASIC, LPC, LSP, Speech coding, VLSI, Vocoder",
author = "Wang, {Jia Ching} and Wang, {Jhing Fa} and Chao, {Yun Fei} and Shi, {Ming Chi}",
year = "2005",
language = "???core.languages.en_GB???",
isbn = "0889865094",
series = "Proceedings of the Third IASTED International Conference on Circuits, Signals, and Systems, CSS 2005",
pages = "239--243",
editor = "V.G. Oklobdzija",
booktitle = "Proceedings of the Third IASTED International Conference on Circuits, Signals, and Systems, CSS 2005",
note = "Third IASTED International Conference on Circuits, Signals, and Systems, CSS 2005 ; Conference date: 24-10-2005 Through 26-10-2005",
}