Verification of pin-accurate port connections

Geeng Wei Lee, Juinn Dar Huang, Chun Yao Wang, Jing Yang Jou

研究成果: 雜誌貢獻期刊論文同行評審

1 引文 斯高帕斯(Scopus)

摘要

Before verifying the functionality of SoCs, designers must ensure the correctness of the pin-accurate interfaces of up to hundreds of integrated IP blocks. This article presents a new connection model and a corresponding error model for pin-accurate port connections, along with an algorithm for generating the minimum pattern set, a methodology for diagnosing errors, and a port connection verification flow.

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頁(從 - 到)478-494
頁數17
期刊IEEE Design and Test of Computers
25
發行號5
DOIs
出版狀態已出版 - 2008

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