Unbalanced-tests to the improvement of yield and quality

Chung Huang Yeh, Jwu E. Chen

研究成果: 雜誌貢獻期刊論文同行評審

2 引文 斯高帕斯(Scopus)

摘要

An integrated-circuit testing model (DITM) is used to describe various factors that affect test yield during a test process. We used a probability distribution model to evaluate test yield and quality and introduced a threshold test and a guardband test. As a result of the development speed of the semiconductor manufacturing industry in the future being unpredictable, we use electrical properties of existing products and the current manufacturing technology to estimate future prod-uct-distribution trends. In the development of very-large-scale integration (VLSI) testing, the progress of testing technology is very slow. To improve product testing yield and quality, we change the test method and propose an unbalanced-test method, leading to improvements in test results. The calculation using our proposed model and data estimated by the product published by the IEEE International Roadmap for Devices and Systems (IRDS, 2017) proves that the proposed unbalanced-test method can greatly improve test yield and quality and achieve the goal of high-quality, near-zero-defect products.

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文章編號3032
期刊Electronics (Switzerland)
10
發行號23
DOIs
出版狀態已出版 - 1 12月 2021

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