Thin Relaxed SiGe Layers for Strained Si CMOS

P. S. Chen, S. W. Lee, M. H. Lee, C. W. Liu, M. J. Tsai

研究成果: 書貢獻/報告類型會議論文篇章同行評審

摘要

High quality, low cost and smooth surface of thin relaxed SiGe layers on new buffers are fabricated This SiGe nanostructure buffers help thin SiGe uniform layers to relax by introducing some dislocations networks. With these novel Si/Ge buffer, the reduction of thickness of relaxed SiGe uniform layer are from 50 to 75% . The mobility enhancement of the strained Si n-MOSFET deposited on theses relaxed SiGe layer/SiGe buffers are 8 to 40% higher than that of controlled compositional graded SiGe buffers. Such thin relaxed SiGe layerson these new buffers proves to be useful approach to fabricate high quality relaxed epilayers with large lattice mismatch.

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主出版物標題2004 Semiconductor Manufacturing Technology Workshop Proceedings, SMTW
頁面79-82
頁數4
出版狀態已出版 - 2004
事件2004 Semiconductor Manufacturing Technology Workshop Proceedings, SMTW - , Taiwan
持續時間: 9 9月 200410 9月 2004

出版系列

名字2004 Semiconductor Manufacturing Technology Workshop Proceedings, SMTW

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???event.eventtypes.event.conference???2004 Semiconductor Manufacturing Technology Workshop Proceedings, SMTW
國家/地區Taiwan
期間9/09/0410/09/04

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