The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique

H. M. Tsai, E. R. Hsieh, Steve S. Chung, C. H. Tsai, R. M. Huang, C. T. Tsai, C. W. Liang

研究成果: 書貢獻/報告類型會議論文篇章同行評審

12 引文 斯高帕斯(Scopus)

摘要

Not only the popular random dopant fluctuation (RDF), but also the traps, caused by the HC stress or NBTI-stress, induce the V th variations. To identify these traps, for the first time, a unique random trap profiling feasible for 3D device applications has been demonstrated on trigate devices. For such devices, the oxide traps are generated not only near the drain side but also on the sidewall, after hot carrier (HC) and NBTI stresses. More importantly, the Vth variation in pMOSFET under NBTI becomes much worse as a result of an additional surface roughness effect. This method provides us a valuable tool for the diagnosis of reliability in 3D devices (e.g., FinFET).

原文???core.languages.en_GB???
主出版物標題2012 Symposium on VLSI Technology, VLSIT 2012 - Digest of Technical Papers
頁面189-190
頁數2
DOIs
出版狀態已出版 - 2012
事件2012 Symposium on VLSI Technology, VLSIT 2012 - Honolulu, HI, United States
持續時間: 12 6月 201214 6月 2012

出版系列

名字Digest of Technical Papers - Symposium on VLSI Technology
ISSN(列印)0743-1562

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???event.eventtypes.event.conference???2012 Symposium on VLSI Technology, VLSIT 2012
國家/地區United States
城市Honolulu, HI
期間12/06/1214/06/12

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