@inproceedings{9b953c391071479e96be1d924559b497,
title = "The understanding of gate capacitance matching on achieving a high performance NC MOSFET with sufficient mobility",
abstract = "We develop experimental approaches to quantitatively extract the negative capacitance of MIM in a gate stacked NCFET. It was found that the NC effect is highly dependent on the grain and dipole behaviors with different annealing temperature. Also, to achieve a better design of high-performance NCFET, we explore not only the capacitance matching between ferroelectric HZO MIM and MOSFET but also how effective mobility is affected by HZO dipoles. For capacitance matching, we observe a 50x enhancement of overall gate capacitance triggered by NC effect, while, however, it adversely generated the degradation of the mobility. This mobility degradation is induced by the remote scattering from the ferroelectric HZO dipoles. Fortunately, if suitable polarization can be formed to align the HZO dipoles, the effects of remote scattering can be mitigated. From a trade-off between gate capacitance and the mobility, an NCFET with desirable performance can be achieved.",
author = "Chiang, {C. K.} and P. Husan and Lou, {Y. C.} and Li, {F. L.} and Hsieh, {E. R.} and Liu, {C. H.} and Chung, {Steve S.}",
note = "Publisher Copyright: {\textcopyright} 2019 JSAP.; 24th Silicon Nanoelectronics Workshop, SNW 2019 ; Conference date: 09-06-2019 Through 10-06-2019",
year = "2019",
month = jun,
doi = "10.23919/SNW.2019.8782951",
language = "???core.languages.en_GB???",
series = "2019 Silicon Nanoelectronics Workshop, SNW 2019",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2019 Silicon Nanoelectronics Workshop, SNW 2019",
}