TY - JOUR
T1 - Testing ternary content addressable memories with comparison faults using march-like tests
AU - Li, Jin Fu
N1 - Publisher Copyright:
© 1982-2012 IEEE.
PY - 2007/5
Y1 - 2007/5
N2 - Ternary content addressable memory (TCAM) plays an important role in various applications for its fast lookup operation. This paper proposes several comparison fault models (i.e., the faults cause Compare operation fail) of TCAMs based on electrical defects, such as shorts between two circuit nodes and transistor stuck-open and stuck-on faults. TwoMarch-like tests for detecting comparison faults are also proposed. The first Marchlike test requires 4N Write operations, 3N Erase operations, and 4N + 2B Compare operations to cover 100% of targeted comparison faults for an N × B-bit TCAM with Hit output only. The second March-like test requires 2N Write operations, 2N Erase operations, and 4N + 2B Compare operations to cover 100% of targeted comparison faults for an N × B-bit TCAM with Hit and Priority Address Encoder outputs. Compared with the previous work, the proposed tests have lower time complexity for typical TCAMs; they can be used to test TCAMs with different comparator structures; and their time complexities are independent of the number of stuck-on faults. Also, they can cover delay faults in comparison circuits.
AB - Ternary content addressable memory (TCAM) plays an important role in various applications for its fast lookup operation. This paper proposes several comparison fault models (i.e., the faults cause Compare operation fail) of TCAMs based on electrical defects, such as shorts between two circuit nodes and transistor stuck-open and stuck-on faults. TwoMarch-like tests for detecting comparison faults are also proposed. The first Marchlike test requires 4N Write operations, 3N Erase operations, and 4N + 2B Compare operations to cover 100% of targeted comparison faults for an N × B-bit TCAM with Hit output only. The second March-like test requires 2N Write operations, 2N Erase operations, and 4N + 2B Compare operations to cover 100% of targeted comparison faults for an N × B-bit TCAM with Hit and Priority Address Encoder outputs. Compared with the previous work, the proposed tests have lower time complexity for typical TCAMs; they can be used to test TCAMs with different comparator structures; and their time complexities are independent of the number of stuck-on faults. Also, they can cover delay faults in comparison circuits.
KW - Comparison faults
KW - content addressable memories(CAMs)
KW - delay faults
KW - march tests
KW - memory testing
KW - ternarycontent addressable memories
UR - http://www.scopus.com/inward/record.url?scp=85082030628&partnerID=8YFLogxK
U2 - 10.1109/TCAD.2007.8361585
DO - 10.1109/TCAD.2007.8361585
M3 - 期刊論文
AN - SCOPUS:85082030628
SN - 0278-0070
VL - 26
SP - 919
EP - 931
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IS - 5
M1 - 8361585
ER -