Testing priority address encoder faults of content addressable memories

研究成果: 書貢獻/報告類型會議論文篇章同行評審

6 引文 斯高帕斯(Scopus)


Content addressable memory (CAM) is one key component in many digital systems. Although the CAM cell usually is implemented with a RAM cell and a comparison logic, the CAM testing is more difficult than the RAM testing. Also, the CAM testing is very different from the RAM testing. Most stuck-at faults (SAFs) in the RAM peripheral circuitry can be mapped to the RAM cell faults. This cannot be analogous to the testing of the priority encoder of CAMs. This paper presents a test algorithm for testing SAFs of the priority encoder in a CAM. The test algorithm only requires 3N-2 Write operations and N+2 Compare operations to cover 100% stuck-at faults of the CMOS priority encoder of an N x B-bit CAM. Compared with typical tests for CAM cell array faults, the fault coverage of SAFs in the priority encoder is increased from 90.2% or 60.5% to 100% for a CAM with 64 words.

主出版物標題IEEE International Test Conference, Proceedings, ITC 2005
出版狀態已出版 - 2005
事件IEEE International Test Conference, ITC 2005 - Austin, TX, United States
持續時間: 8 11月 200510 11月 2005


名字Proceedings - International Test Conference


???event.eventtypes.event.conference???IEEE International Test Conference, ITC 2005
國家/地區United States
城市Austin, TX


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