System implementation of I-phone hardware by using low bit rate speech coding

Ruei Xi Chen, Mei Juan Chen, Liang Gee Chen, Tsung Han Tsai

研究成果: 會議貢獻類型會議論文同行評審

摘要

This paper presents a system implementation for Internet-phone communication with real-time speech coding schemes. A low-cost speech processing coprocessor is embedded. A CPLD device is used to implement the interface between the host processor and the coprocessor via conventional parallel port. At the headphone interface, there are a 16-bits PCM CODEC and an audio amplifier with acoustic echo cancellation features employed. The system consists of a mixed implementation of software and hardware. The experimental coding rate is 8.5 kbps. In such rate, a 14.4 kbps or higher speed modem can conform to offer full-duplex speech for the applications such as digital simultaneous voice data (DSVD).

原文???core.languages.en_GB???
頁面489-499
頁數11
出版狀態已出版 - 1997
事件Proceedings of the 1997 IEEE Workshop on Signal Processing Systems, SiPS 97: Design and Implementation - Leicester, UK
持續時間: 3 11月 19975 11月 1997

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???event.eventtypes.event.conference???Proceedings of the 1997 IEEE Workshop on Signal Processing Systems, SiPS 97: Design and Implementation
城市Leicester, UK
期間3/11/975/11/97

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