@inproceedings{7ec5e73467054a10b45c9765b2af0f40,
title = "Sub-60 mV/dec ferroelectric HZO MoS2 negative capacitance field-effect transistor with internal metal gate: The role of parasitic capacitance",
abstract = "Steep-slope MoS2 NC-FETs with ferroelectric HZO and internal metal gate in the gate dielectric stack are demonstrated. SS less than 50 mV/dec is obtained for both forward and reverse gate voltage sweeps, with minimum SSFor = 37.6 mV/dec and minimum SSRev = 42.2 mV/dec. A second minimum of SSRev as low as 8.3 mV/dec can be measured as the result of dynamic switching at high speed in ferroelectric HZO. The impact of parasitic capacitance on SS and dynamic hysteresis is systematically studied by both experiment and dynamic simulation.",
author = "M. Si and C. Jiang and Su, {C. J.} and Tang, {Y. T.} and L. Yang and W. Chung and Alam, {M. A.} and Ye, {P. D.}",
note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 63rd IEEE International Electron Devices Meeting, IEDM 2017 ; Conference date: 02-12-2017 Through 06-12-2017",
year = "2018",
month = jan,
day = "23",
doi = "10.1109/IEDM.2017.8268447",
language = "???core.languages.en_GB???",
series = "Technical Digest - International Electron Devices Meeting, IEDM",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "23.5.1--23.5.4",
booktitle = "2017 IEEE International Electron Devices Meeting, IEDM 2017",
}