Static divided word matching line for low-power content addressable memory design

Kuo Hsing Cheng, Chia Hung Wei, Shu Yu Jiang

研究成果: 雜誌貢獻會議論文同行評審

24 引文 斯高帕斯(Scopus)

摘要

In this paper, a novel Content Addressable Memory (CAM) word structure with divided word matching line for low-power application is proposed. To reduce the comparison power consumption, the proposed CAM word structure adopts static circuit design to improve the overall system reliability and reduce the power consumption. In addition, a new CAM cell with single bit line circuit design is proposed. The single bit line design requires only one heavy loading bit line, and prevents the frequently switching that designed in conventional basic CAM cell. Based on TSMC 0.25 μm CMOS process with 2.5 V supply voltage, a 128 words by 32 bits CAM is designed. The simulation result shows that the power consumption of the proposed CAM is 17.12 mW under 300 MHz operation frequency.

原文???core.languages.en_GB???
頁(從 - 到)II629-II632
期刊Proceedings - IEEE International Symposium on Circuits and Systems
2
出版狀態已出版 - 2004
事件2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada
持續時間: 23 5月 200426 5月 2004

指紋

深入研究「Static divided word matching line for low-power content addressable memory design」主題。共同形成了獨特的指紋。

引用此