Special Session: Architecture-Level DCIM Technologies for Edge AI Computing Applications

Nowadays, deep neural networks (DNNs) and artificial intelligence (AI) are widely used in image recognition, autonomous vehicles, speech recognition, and natural language processing. However, the Von-Neumann bottleneck slows down data retrieval from memory, consuming significant time and energy. The technique of computing in memory (CIM) (including analog CIM (ACIM) and digital CIM (DCIM)) has emerged as a solution, integrating computing logic into memory to improve power efficiency by reducing data movement. Despite CIM's advantages, it still faces challenges like accuracy, adaptability and dataflow flexibility due to the computing complexity. This paper addresses the architecture-level digital computing in memory (DCIM) framework to discuss the abovementioned issues, ensuring the features of low-power, high-precision, reconfigurability, and repairability across diverse DNN applications. Additionally, for large-scale language model applications like LLMs and Transformers, a scalable DCIM chiplet architecture is introduced, leveraging 2.5D/3D heterogeneous packaging technologies to achieve flexible scalability, meeting various edge AI computing requirements.