SLOPE: A test pattern generator based on stop line oriented path end algorithm

Shih Jen Chuang, Chung Len Lee, Wen Zen Shen, Chein Wei Jen, Jwu E. Chen, Sen Chung Jing, Ming Der Chen

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

The authors presents a test pattern generator, SLOPE, based on the stop line oriented path end algorithm, for combinational digital circuits. It combines the advantages of FAN and FAST by utilizing a controllability measure and observability measure to assist guessing in the test generation process. With some strategies adopted in the algorithm, it generates tests with fewer number of backtrackings. Benchmark circuits run with SLOPE show that it outperforms PODEM and FAN for most circuits.

原文???core.languages.en_GB???
主出版物標題Proceedings - IEEE International Symposium on Circuits and Systems
發行者Publ by IEEE
頁面437-439
頁數3
ISBN(列印)9517212399
出版狀態已出版 - 1988

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
1
ISSN(列印)0271-4310

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