TY - JOUR
T1 - Single-Chip Design for Intelligent Surveillance System
AU - Tsai, Tsung Han
AU - Chen, Shih Wei
N1 - Publisher Copyright:
© 1993-2012 IEEE.
PY - 2018/9
Y1 - 2018/9
N2 - During recent years, a digital surveillance system has gained more popularity. Object recognition plays a critical role in an intelligent surveillance system. It mainly consists of several vision-based techniques such as segmentation and tracking. However, these techniques are still challenging. In this paper, an intelligent surveillance system has been proposed on the basis of single-chip design. An algorithm development and its hardware implementation are well addressed. Our algorithm accomplishes tracking of moving people through successive frames without using boundary box of object or color cues. Although there is occlusion due to gathering of people and other foreground objects, still the proposed algorithm can deal with such situations. The developed hardware architecture involves several tasks including foreground detection, sliced connected component labeling, object grouping, and object tracking. We use parallel processing on object labeling architecture and give the upper and lower image label values simultaneously. Object grouping and object tracking are also manipulated to improve the performance. The whole system is designed using single-chip solution. It is implemented by TSMC 90-nm library with 18.71-K logic gates, 92.288-kB on-chip memory, and 11.4037-mW low power consumption.
AB - During recent years, a digital surveillance system has gained more popularity. Object recognition plays a critical role in an intelligent surveillance system. It mainly consists of several vision-based techniques such as segmentation and tracking. However, these techniques are still challenging. In this paper, an intelligent surveillance system has been proposed on the basis of single-chip design. An algorithm development and its hardware implementation are well addressed. Our algorithm accomplishes tracking of moving people through successive frames without using boundary box of object or color cues. Although there is occlusion due to gathering of people and other foreground objects, still the proposed algorithm can deal with such situations. The developed hardware architecture involves several tasks including foreground detection, sliced connected component labeling, object grouping, and object tracking. We use parallel processing on object labeling architecture and give the upper and lower image label values simultaneously. Object grouping and object tracking are also manipulated to improve the performance. The whole system is designed using single-chip solution. It is implemented by TSMC 90-nm library with 18.71-K logic gates, 92.288-kB on-chip memory, and 11.4037-mW low power consumption.
KW - Application-specified integrated circuit (ASIC)
KW - foreground detection
KW - object labeling
KW - object tracking
KW - smart camera
UR - http://www.scopus.com/inward/record.url?scp=85047608886&partnerID=8YFLogxK
U2 - 10.1109/TVLSI.2018.2827385
DO - 10.1109/TVLSI.2018.2827385
M3 - 期刊論文
AN - SCOPUS:85047608886
SN - 1063-8210
VL - 26
SP - 1637
EP - 1646
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IS - 9
M1 - 8362958
ER -