Simulation based verification of register-transfer level behavioral synthesis tools

R. Ernst, S. Sutarwala, J. Y. Jou, M. Tong

研究成果: 書貢獻/報告類型會議論文篇章同行評審

1 引文 斯高帕斯(Scopus)

摘要

The authors present a simulation based system for verification of register-transfer level behavioral synthesis tools. Applications are tool debugging and automatic regression test. Key feature is a transformation of sequential circuits for application of pseudo-random test patterns. The results show a high relevance of verification with pseudo-random patterns.

原文???core.languages.en_GB???
主出版物標題Proceedings of the European Design Automation Conference, EDAC 1990
發行者Institute of Electrical and Electronics Engineers Inc.
頁面396-400
頁數5
ISBN(電子)0818620242, 9780818620249
DOIs
出版狀態已出版 - 1990
事件1990 European Design Automation Conference, EDAC 1990 - Glasgow, United Kingdom
持續時間: 12 3月 199015 3月 1990

出版系列

名字Proceedings of the European Design Automation Conference, EDAC 1990

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???event.eventtypes.event.conference???1990 European Design Automation Conference, EDAC 1990
國家/地區United Kingdom
城市Glasgow
期間12/03/9015/03/90

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