RF model and verification of through-silicon vias in fully integrated sige power amplifier

Hsien Yuan Liao, Hwann Kaeo Chiou

研究成果: 雜誌貢獻期刊論文同行評審

12 引文 斯高帕斯(Scopus)

摘要

This letter proposes an RF model of through-silicon via (TSV) considering both skin-depth and lossy substrate effects up to 20 GHz. The TSV is fabricated in 0.18-μm SiGe BiCMOS process with the dimensions of 50 μm in diameter and 100 μm in depth. The equivalent circuit model is extracted from the measured results and physical structure of a single TSV. The frequency-dependent characteristics of TSV can be completely modeled by frequency-independent lumped elements through parameter extraction. Furthermore, a fully integrated SiGe power amplifier (PA) with TSVs is designed to verify the accuracy of the RF model of TSV. Meanwhile, a PA without TSVs is fabricated to compare the performance of the PA with TSVs. Due to the low parasitic impedance of TSVs, the PA with TSVs achieves better performance than that without TSVs, where the improvement is 0.5 dB in power gain and 2% in power-added efficiency, respectively.

原文???core.languages.en_GB???
文章編號5763747
頁(從 - 到)809-811
頁數3
期刊IEEE Electron Device Letters
32
發行號6
DOIs
出版狀態已出版 - 6月 2011

指紋

深入研究「RF model and verification of through-silicon vias in fully integrated sige power amplifier」主題。共同形成了獨特的指紋。

引用此