Oscillation ring based interconnect test scheme for SOC

Katherine Shu Min Li, Chung Len Lee, Chauchin Su, Jwu E. Chen

研究成果: 書貢獻/報告類型會議論文篇章同行評審

25 引文 斯高帕斯(Scopus)

摘要

We propose a novel oscillation ring (OR) test architecture for testing interconnects in SoC. In addition to stuck-at and open faults, this scheme can detect delay faults and crosstalk glitches. IEEE P1500 wrapper cells are modified. An efficient ring-generation algorithm is proposed to construct ORs based on a graph model. Experimental results on MCNC benchmark circuits show the feasibility of the scheme and the effectiveness of,the algorithm. Our method achieves 100% fault coverage with a small number of tests.

原文???core.languages.en_GB???
主出版物標題Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
發行者Institute of Electrical and Electronics Engineers Inc.
頁面184-187
頁數4
ISBN(列印)0780387368, 9780780387362
DOIs
出版狀態已出版 - 2005
事件2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 - Shanghai, China
持續時間: 18 1月 200521 1月 2005

出版系列

名字Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
1

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
國家/地區China
城市Shanghai
期間18/01/0521/01/05

指紋

深入研究「Oscillation ring based interconnect test scheme for SOC」主題。共同形成了獨特的指紋。

引用此