NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFEto Break Great Memory Wall with 10 ns of PGM-pulse, 1010Cycles of Endurance, and Decade Lifetime at 103 °C

E. R. Hsieh; J. K. Chang; T. Y. Tang; Y. J. Li; C. W. Liang; M. Y. Lin; S. Y. Huang; C. J. Su; J. C. Guo; S. S. Chung

doi:10.1109/VLSITechnologyandCir46769.2022.9830515

NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnC_FEto Break Great Memory Wall with 10 ns of PGM-pulse, 10¹⁰Cycles of Endurance, and Decade Lifetime at 103 °C

E. R. Hsieh, J. K. Chang, T. Y. Tang, Y. J. Li, C. W. Liang, M. Y. Lin, S. Y. Huang, C. J. Su, J. C. Guo, S. S. Chung

電機工程學系

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

3 引文斯高帕斯（Scopus）

摘要

A novel concept of NVDimm-FE has been proposed to replace the DRAM position in the memory hierarchy. A high-density 3D architecture of 3-bit-per-CFE 2-transistors and n-ferroelectric-capacitances (3-bit/c 2TnCFE) array has been developed as a platform to realize this concept. Our results have shown that 3D 3-bit/c 2TnCFE array achieves 3.1V of the memory window, 62% of the program (PGM) efficiency, 10 ns of PGM-speed at 2.1MV/cm, excellent endurance up to 1010 times for each state of 3-bits per CFE (8 states), and retention for decade-lifetime prediction of the ferroelectric-NVMs at 103 °C. With the assistance of 3D integration of many vertical CFE layers, the 2TnCFE has been proved to be an ultra-high-density candidate of the NVDimm-FE to break the GREAT memory wall and boost high-performance computing efficiency in the future.

原文	???core.languages.en_GB???
主出版物標題	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	359-360
頁數	2
ISBN（電子）	9781665497725
DOIs	https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830515
出版狀態	已出版 - 2022
事件	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 - Honolulu, United States 持續時間: 12 6月 2022 → 17 6月 2022

出版系列

名字	Digest of Technical Papers - Symposium on VLSI Technology
卷	2022-June
ISSN（列印）	0743-1562

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
國家/地區	United States
城市	Honolulu
期間	12/06/22 → 17/06/22

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10.1109/VLSITechnologyandCir46769.2022.9830515

仿生運算於AI晶片之開發與應用：建構通用型類神經網路技術平台與異質晶片整合於圖片辨識之應用(1/3)
Hsieh, E.-R. (PI)
1/02/20 → 31/01/21
研究計畫: Research

引用此

Hsieh, E. R., Chang, J. K., Tang, T. Y., Li, Y. J., Liang, C. W., Lin, M. Y., Huang, S. Y., Su, C. J., Guo, J. C., & Chung, S. S. (2022). NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnC_FEto Break Great Memory Wall with 10 ns of PGM-pulse, 10¹⁰Cycles of Endurance, and Decade Lifetime at 103 °C. 於 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 (頁 359-360). (Digest of Technical Papers - Symposium on VLSI Technology; 卷 2022-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830515

Hsieh, E. R. ; Chang, J. K. ; Tang, T. Y. 等. / NVDimm-FE : A High-density 3D Architecture of 3-bit/c 2TnC_FEto Break Great Memory Wall with 10 ns of PGM-pulse, 10¹⁰Cycles of Endurance, and Decade Lifetime at 103 °C. 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., 2022. 頁 359-360 (Digest of Technical Papers - Symposium on VLSI Technology).

@inproceedings{603bcf10f191450dbed2738c18124394,

title = "NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFEto Break Great Memory Wall with 10 ns of PGM-pulse, 1010Cycles of Endurance, and Decade Lifetime at 103 °C",

abstract = "A novel concept of NVDimm-FE has been proposed to replace the DRAM position in the memory hierarchy. A high-density 3D architecture of 3-bit-per-CFE 2-transistors and n-ferroelectric-capacitances (3-bit/c 2TnCFE) array has been developed as a platform to realize this concept. Our results have shown that 3D 3-bit/c 2TnCFE array achieves 3.1V of the memory window, 62% of the program (PGM) efficiency, 10 ns of PGM-speed at 2.1MV/cm, excellent endurance up to 1010 times for each state of 3-bits per CFE (8 states), and retention for decade-lifetime prediction of the ferroelectric-NVMs at 103 °C. With the assistance of 3D integration of many vertical CFE layers, the 2TnCFE has been proved to be an ultra-high-density candidate of the NVDimm-FE to break the GREAT memory wall and boost high-performance computing efficiency in the future.",

author = "Hsieh, {E. R.} and Chang, {J. K.} and Tang, {T. Y.} and Li, {Y. J.} and Liang, {C. W.} and Lin, {M. Y.} and Huang, {S. Y.} and Su, {C. J.} and Guo, {J. C.} and Chung, {S. S.}",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 ; Conference date: 12-06-2022 Through 17-06-2022",

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doi = "10.1109/VLSITechnologyandCir46769.2022.9830515",

language = "???core.languages.en_GB???",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

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Hsieh, ER, Chang, JK, Tang, TY, Li, YJ, Liang, CW, Lin, MY, Huang, SY, Su, CJ, Guo, JC & Chung, SS 2022, NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnC_FEto Break Great Memory Wall with 10 ns of PGM-pulse, 10¹⁰Cycles of Endurance, and Decade Lifetime at 103 °C. 於 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Digest of Technical Papers - Symposium on VLSI Technology, 卷 2022-June, Institute of Electrical and Electronics Engineers Inc., 頁 359-360, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, Honolulu, United States, 12/06/22. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830515

NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnC_FEto Break Great Memory Wall with 10 ns of PGM-pulse, 10¹⁰Cycles of Endurance, and Decade Lifetime at 103 °C. / Hsieh, E. R.; Chang, J. K.; Tang, T. Y. 等.
2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 359-360 (Digest of Technical Papers - Symposium on VLSI Technology; 卷 2022-June).

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

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T2 - 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022

AU - Hsieh, E. R.

AU - Chang, J. K.

AU - Tang, T. Y.

AU - Li, Y. J.

AU - Liang, C. W.

AU - Lin, M. Y.

AU - Huang, S. Y.

AU - Su, C. J.

AU - Guo, J. C.

AU - Chung, S. S.

PY - 2022

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N2 - A novel concept of NVDimm-FE has been proposed to replace the DRAM position in the memory hierarchy. A high-density 3D architecture of 3-bit-per-CFE 2-transistors and n-ferroelectric-capacitances (3-bit/c 2TnCFE) array has been developed as a platform to realize this concept. Our results have shown that 3D 3-bit/c 2TnCFE array achieves 3.1V of the memory window, 62% of the program (PGM) efficiency, 10 ns of PGM-speed at 2.1MV/cm, excellent endurance up to 1010 times for each state of 3-bits per CFE (8 states), and retention for decade-lifetime prediction of the ferroelectric-NVMs at 103 °C. With the assistance of 3D integration of many vertical CFE layers, the 2TnCFE has been proved to be an ultra-high-density candidate of the NVDimm-FE to break the GREAT memory wall and boost high-performance computing efficiency in the future.

AB - A novel concept of NVDimm-FE has been proposed to replace the DRAM position in the memory hierarchy. A high-density 3D architecture of 3-bit-per-CFE 2-transistors and n-ferroelectric-capacitances (3-bit/c 2TnCFE) array has been developed as a platform to realize this concept. Our results have shown that 3D 3-bit/c 2TnCFE array achieves 3.1V of the memory window, 62% of the program (PGM) efficiency, 10 ns of PGM-speed at 2.1MV/cm, excellent endurance up to 1010 times for each state of 3-bits per CFE (8 states), and retention for decade-lifetime prediction of the ferroelectric-NVMs at 103 °C. With the assistance of 3D integration of many vertical CFE layers, the 2TnCFE has been proved to be an ultra-high-density candidate of the NVDimm-FE to break the GREAT memory wall and boost high-performance computing efficiency in the future.

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BT - 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022

PB - Institute of Electrical and Electronics Engineers Inc.

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ER -

Hsieh ER, Chang JK, Tang TY, Li YJ, Liang CW, Lin MY 等. NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnC_FEto Break Great Memory Wall with 10 ns of PGM-pulse, 10¹⁰Cycles of Endurance, and Decade Lifetime at 103 °C. 於 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 359-360. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.1109/VLSITechnologyandCir46769.2022.9830515

NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFEto Break Great Memory Wall with 10 ns of PGM-pulse, 1010Cycles of Endurance, and Decade Lifetime at 103 °C

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仿生運算於AI晶片之開發與應用：建構通用型類神經網路技術平台與異質晶片整合於圖片辨識之應用(1/3)

引用此

NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnC_FEto Break Great Memory Wall with 10 ns of PGM-pulse, 10¹⁰Cycles of Endurance, and Decade Lifetime at 103 °C