Novel scalable architecture with memory interleaving organization for full search block-matching algorithm

Yeong Kang Lai; Liang Gee Chen; Tsung Han Tsai; Po Cheng Wu

Novel scalable architecture with memory interleaving organization for full search block-matching algorithm

Yeong Kang Lai, Liang Gee Chen, Tsung Han Tsai, Po Cheng Wu

電機工程學系

研究成果: 雜誌貢獻 › 會議論文 › 同行評審

4 引文斯高帕斯（Scopus）

摘要

This paper describes a high-throughput scalable architecture for full-search block-matching algorithm (FSBMA). The number of processing elements (PEs) is scalable according to the variable algorithm parameters and the performance required for different applications. By use of the efficient PE-rings and the intelligent memory-interleaving organization, the efficiency of the architecture can be increased. Techniques for reducing interconnections and external memory accesses are also presented. Our results demonstrate that the scalable PE-ringed architecture is a flexible and high-performance solution for FSBMA.

原文	???core.languages.en_GB???
頁（從 - 到）	1229-1232
頁數	4
期刊	Proceedings - IEEE International Symposium on Circuits and Systems
卷	2
出版狀態	已出版 - 1997
事件	Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4) - Hong Kong, Hong Kong 持續時間: 9 6月 1997 → 12 6月 1997

引用此

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AU - Wu, Po Cheng

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N2 - This paper describes a high-throughput scalable architecture for full-search block-matching algorithm (FSBMA). The number of processing elements (PEs) is scalable according to the variable algorithm parameters and the performance required for different applications. By use of the efficient PE-rings and the intelligent memory-interleaving organization, the efficiency of the architecture can be increased. Techniques for reducing interconnections and external memory accesses are also presented. Our results demonstrate that the scalable PE-ringed architecture is a flexible and high-performance solution for FSBMA.

AB - This paper describes a high-throughput scalable architecture for full-search block-matching algorithm (FSBMA). The number of processing elements (PEs) is scalable according to the variable algorithm parameters and the performance required for different applications. By use of the efficient PE-rings and the intelligent memory-interleaving organization, the efficiency of the architecture can be increased. Techniques for reducing interconnections and external memory accesses are also presented. Our results demonstrate that the scalable PE-ringed architecture is a flexible and high-performance solution for FSBMA.

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EP - 1232

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4)

Y2 - 9 June 1997 through 12 June 1997

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Novel scalable architecture with memory interleaving organization for full search block-matching algorithm

摘要

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