Low phase noise and low power consumption VCOs using CMOS and IPD technologies

Yuan Chia Hsu, Hwann Kaeo Chiou, Hsien Ku Chen, Ta Yeh Lin, Da Chiang Chang, Ying Zong Juang

研究成果: 雜誌貢獻期刊論文同行評審

25 引文 斯高帕斯(Scopus)

摘要

This paper presents two voltage controlled oscillators (VCOs) operating at 5.42 and 5.76 GHz implemented in 0.18-m complementary metal-oxide semiconductor (CMOS) technology with integrated passive device (IPD) inductors. One IPD inductor was stacked on the top of the active region of the 5.76-GHz VCO chip, whereas the other IPD inductor was placed on the top of the 5.42-GHz VCO CMOS chip but far from the its active region. The high-quality IPD inductors reduce the phase noise of the VCOs. The measurements of the two VCOs indicate the same phase noise of -120 dBc/Hz at 1 MHz offset frequency. These results demonstrate a 6-dB improvement compared to the VCO using an on-chip inductor. This paper also presents the effect of the coupling between the IPD inductor and the active region of the chip on the phase noise performance.

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文章編號5759734
頁(從 - 到)673-680
頁數8
期刊IEEE Transactions on Components, Packaging and Manufacturing Technology
1
發行號5
DOIs
出版狀態已出版 - 5月 2011

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