JPEG2000 encoder architecture design with Fast EBCOT algorithm

Tsung Han Tsai; Lian Tsung Tsai

doi:10.1109/VDAT.2005.1500075

JPEG2000 encoder architecture design with Fast EBCOT algorithm

Tsung Han Tsai, Lian Tsung Tsai

電機工程學系

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

3 引文斯高帕斯（Scopus）

摘要

This paper presents an architecture design for JPEG2000 with a fast algorithm in EBCOT. The EBCOT algorithm takes advantages of resolution and SNR scalability together with a random access property, but its complexity also becomes the bottleneck of JPEG2000. In this paper, we propose fast algorithm that using two speed-up methods for EDCOT context modeling. The gate counts of JPEG2000 design is about 105.9 K gate with TSMC 0.25 um technology. It can encode 4.2 million pixels per second at 40 MHz.

原文	???core.languages.en_GB???
主出版物標題	2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
頁面	279-282
頁數	4
DOIs	https://doi.org/10.1109/VDAT.2005.1500075
出版狀態	已出版 - 2005
事件	2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT) - Hsinchu, Taiwan 持續時間: 27 4月 2005 → 29 4月 2005

出版系列

名字	2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
卷	2005

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
國家/地區	Taiwan
城市	Hsinchu
期間	27/04/05 → 29/04/05

存取文件

10.1109/VDAT.2005.1500075

引用此

Tsai, T. H., & Tsai, L. T. (2005). JPEG2000 encoder architecture design with Fast EBCOT algorithm. 於 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT) (頁 279-282). 文章 1500075 (2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT); 卷 2005). https://doi.org/10.1109/VDAT.2005.1500075

@inproceedings{38acfe3b12284a169a4860b2117c303f,

title = "JPEG2000 encoder architecture design with Fast EBCOT algorithm",

abstract = "This paper presents an architecture design for JPEG2000 with a fast algorithm in EBCOT. The EBCOT algorithm takes advantages of resolution and SNR scalability together with a random access property, but its complexity also becomes the bottleneck of JPEG2000. In this paper, we propose fast algorithm that using two speed-up methods for EDCOT context modeling. The gate counts of JPEG2000 design is about 105.9 K gate with TSMC 0.25 um technology. It can encode 4.2 million pixels per second at 40 MHz.",

author = "Tsai, {Tsung Han} and Tsai, {Lian Tsung}",

year = "2005",

doi = "10.1109/VDAT.2005.1500075",

language = "???core.languages.en_GB???",

isbn = "0780390601",

series = "2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)",

pages = "279--282",

booktitle = "2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)",

note = "2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT) ; Conference date: 27-04-2005 Through 29-04-2005",

}

Tsai, TH & Tsai, LT 2005, JPEG2000 encoder architecture design with Fast EBCOT algorithm. 於 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)., 1500075, 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT), 卷 2005, 頁 279-282, 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT), Hsinchu, Taiwan, 27/04/05. https://doi.org/10.1109/VDAT.2005.1500075

JPEG2000 encoder architecture design with Fast EBCOT algorithm. / Tsai, Tsung Han; Tsai, Lian Tsung.
2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT). 2005. p. 279-282 1500075 (2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT); 卷 2005).

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

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AB - This paper presents an architecture design for JPEG2000 with a fast algorithm in EBCOT. The EBCOT algorithm takes advantages of resolution and SNR scalability together with a random access property, but its complexity also becomes the bottleneck of JPEG2000. In this paper, we propose fast algorithm that using two speed-up methods for EDCOT context modeling. The gate counts of JPEG2000 design is about 105.9 K gate with TSMC 0.25 um technology. It can encode 4.2 million pixels per second at 40 MHz.

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T3 - 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)

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T2 - 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)

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JPEG2000 encoder architecture design with Fast EBCOT algorithm

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