@inproceedings{4ff5ba12825841e1976c8ec0369d45fe,
title = "Implementation of a delta-sigma analog-to-digital converter",
abstract = "The sigma-delta analog-to-digital converter (ADC) has less consumption of circuit power and can achieve higher resolution. In this chapter, a sigma-delta ADC which contains a second-order sigma-delta modulator is presented. The modulator architecture is first designed by using the behavioral simulation of MATLAB, and then the TSMC 0.18 μm single-poly six-metal process. Layout of each analog block has been shown. Simulation results show that, with an input of a 6 dB 1 kHz sine, the delta-sigma ADC can achieve an SNR of 87.2 dB. The core size is 0.6456 mm 0.3340 mm. With a 16-bit resolution, it is suitable for audio applications.",
keywords = "ADC, Modulation, Sigma-delta",
author = "Hsieh, {Chin Fa} and Tsai, {Tsung Han} and Chen, {Chun Sheng} and Hsieh, {Yu Hao}",
note = "Publisher Copyright: {\textcopyright} Springer International Publishing Switzerland 2016.; 3rd International Conference on Intelligent Technologies and Engineering Systems, ICITES 2014 ; Conference date: 19-12-2014 Through 21-12-2014",
year = "2016",
doi = "10.1007/978-3-319-17314-6_34",
language = "???core.languages.en_GB???",
isbn = "9783319173139",
series = "Lecture Notes in Electrical Engineering",
publisher = "Springer Verlag",
pages = "257--262",
editor = "Jengnan Juang",
booktitle = "Proceedings of the 3rd International Conference on Intelligent Technologies and Engineering Systems, ICITES 2014",
}