High performance power VDMOSFETs with a split-gate floating np-well design

Chien Nan Liao, Feng Tso Chien, Chii Wen Chen, Ching Hwa Cheng, Yao Tsung Tsai

研究成果: 雜誌貢獻期刊論文同行評審

4 引文 斯高帕斯(Scopus)

摘要

Low gate charge power vertical double-diffused MOSFET devices are required for high-frequency systems. In this study, we proposed a split-gate with a floating np-well structure, which realizes a low gate charge performance without significantly degrading the breakdown voltage. The proposed structure removes the partial gate area between the gate and drain overlap area, and combines with an additional np-well. By this approach, the gate charge and switching loss can be reduced, and the breakdown voltage can be sustained. The gate-drain charge and gate charge of the split-gate with an np-well structure are 41.4% and 66.1% of the conventional device, respectively. These improvements are beneficial for reducing the switching loss of the devices.

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文章編號122001
期刊Semiconductor Science and Technology
23
發行號12
DOIs
出版狀態已出版 - 1 12月 2008

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