每年專案
摘要
Ensuring the security of memory is crucial in current processor design, where memory is not only used for data storage but also for in-memory computation. In this paper, we explore the security design of embedded memory, focusing on possible hardware Trojans. We provide an overview of existing hardware Trojan designs in the memory mode, covering both SRAM (volatile memory) and STT-MARM (non-volatile memory). Then, we propose an innovative concept for a potential hardware Trojan design in the computing mode, specifically tailored for computing-in-memories. This paper aims to provide insights into the ways in which hardware Trojans exist and the measures we can take to mitigate their impact. These insights can pave the way for exploring detection and prevention methods to enhance memory design security.
原文 | ???core.languages.en_GB??? |
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主出版物標題 | 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023 |
編輯 | Luca Cassano, Mihalis Psarakis, Marcello Traiola, Alberto Bosio |
發行者 | Institute of Electrical and Electronics Engineers Inc. |
ISBN(電子) | 9798350315004 |
DOIs | |
出版狀態 | 已出版 - 2023 |
事件 | 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023 - Juan-Les-Pins, France 持續時間: 3 10月 2023 → 5 10月 2023 |
出版系列
名字 | Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT |
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ISSN(列印) | 2576-1501 |
ISSN(電子) | 2765-933X |
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???event.eventtypes.event.conference??? | 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023 |
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國家/地區 | France |
城市 | Juan-Les-Pins |
期間 | 3/10/23 → 5/10/23 |
指紋
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