Hardware architecture design for real-time SIFT extraction with reduced memory usage

Keyphrases

• Reduced Memory 100%
• Hardware Architecture 100%
• Architectural Design 100%
• Memory Consumption 100%
• Scale-invariant Feature Transform 100%
• Real Time Scale 100%
• Memory Requirements 66%
• Computational Complexity 33%
• Image Resolution 33%
• 90-nm CMOS Technology 33%
• Computation Complexity 33%
• ASIC Design 33%
• Real-time Performance 33%
• Rotational Deformation 33%
• Coordinate Rotation Digital Computer (CORDIC) 33%
• Deformation Changes 33%
• Lighting Changes 33%
• Parallel Operation 33%
• Image Scaling 33%
• Cascade Operation 33%
• Gaussian Pyramid 33%
• Scale-invariant Feature Transform Algorithm 33%

Computer Science

• Architecture Design 100%
• Hardware Architecture 100%
• Scale-Invariant Feature Transform 100%
• Memory Requirement 50%
• Computational Complexity 25%
• Computation Complexity 25%
• Application Specific Integrated Circuit 25%
• Real Time Performance 25%
• Digital Computer 25%
• Transform Algorithm 25%
• Parallel Operation 25%

Engineering

• Feature Transform 100%
• Memory Requirement 50%
• Computational Complexity 25%
• Gaussians 25%
• Feature Point 25%
• Image Resolution 25%
• Application Specific Integrated Circuit 25%
• Computation Complexity 25%
• Digital Computer 25%