GaN enhancement mode metal-oxide semiconductor field effect transistors

Y. Irokawa, Y. Nakano, M. Ishiko, T. Kachi, J. Kim, F. Ren, B. P. Gila, A. H. Onstine, C. R. Abernathy, S. J. Pearton, C. C. Pan, G. T. Chen, J. I. Chyi

研究成果: 雜誌貢獻期刊論文同行評審

4 引文 斯高帕斯(Scopus)

摘要

The initial demonstration of an enhancement mode MgO/p-GaN metal-oxide semiconductor field effect transistor (MOSFET) utilizing Si+ ion implanted regions under the source and drain to provide a source of minority carriers for inversion was reported. The breakdown voltage for an 80 nm thick MgO gate dielectric was ∼14 V, corresponding to a breakdown field strength of 1.75 MVcm-1 and the p-n junction formed between the p-epi and the source had a reverse breakdown voltage >15 V. Inversion of the channel was achieved for gate voltages above 6 V.The maximum transconductance was 5.4 μSmm-1 at a drain-source voltage of 5 V.

原文???core.languages.en_GB???
頁(從 - 到)2668-2671
頁數4
期刊Physica Status Solidi C: Conferences
2
發行號7
DOIs
出版狀態已出版 - 2005

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