FSM-based transaction-level functional coverage for interface compliance verification

Man Yun Su, Che Hua Shih, Juinn Dar Huang, Jing Yang Jou

研究成果: 書貢獻/報告類型會議論文篇章同行評審

6 引文 斯高帕斯(Scopus)

摘要

Interface compliance verification plays a very important role in modern SoC designs. In order to perform a quantitative analysis of simulation completeness, adequate coverage metrics are mandatory. In this paper, we propose a finite state machine (FSM) based transaction-level functional coverage methodology for interface compliance verification. A language, State-Oriented Language (SOL), is developed to specify functional transactions mainly at the higher FSM level instead of lower logic or signal level. By utilizing SOL, it is simple and rigorous to specify interesting transactions from the specification FSM of the target interface protocol. Experimental results show that the proposed methodology can effectively improve the verification quality as well as increase the efficiency of regression verification.

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主出版物標題Proceedings of the ASP-DAC 2006
主出版物子標題Asia and South Pacific Design Automation Conference 2006
發行者Institute of Electrical and Electronics Engineers Inc.
頁面448-453
頁數6
ISBN(列印)0780394518, 9780780394513
DOIs
出版狀態已出版 - 2006
事件ASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006 - Yokohama, Japan
持續時間: 24 1月 200627 1月 2006

出版系列

名字Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
2006

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???event.eventtypes.event.conference???ASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006
國家/地區Japan
城市Yokohama
期間24/01/0627/01/06

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