FPGA prototyping for CORDIC-based OFDM baseband receiver

Chih Feng Wu, Muh Tian Shiue

研究成果: 書貢獻/報告類型會議論文篇章同行評審

1 引文 斯高帕斯(Scopus)

摘要

In this paper, a FPGA prototyping of CORDIC-based OFDM baseband receiver is presented to demonstrate the joint carrier synchronization and channel equalization algorithm. The versatile arithmetics of CORDIC are employed to realize various baseband operations, including gain adjustment, phase compensation, initial gain/phase estimation and derotator. The maximum uncoded data rate of the FPGA prototyping is 72 Mbps for 64-QAM modulation. The measured EVM for given SNR=26 dB and 64-QAM is -31 dB. The physical design shows that the core area is 1.2 mm2 with 0.18 μm CMOS technology. The core power consumption is 33.2 mW with 1.8 V supply voltage and 40 MHz operating clock.

原文???core.languages.en_GB???
主出版物標題2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781479923342
DOIs
出版狀態已出版 - 13 3月 2014
事件2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014 - Chengdu, China
持續時間: 18 6月 201420 6月 2014

出版系列

名字2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014

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???event.eventtypes.event.conference???2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014
國家/地區China
城市Chengdu
期間18/06/1420/06/14

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