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FPGA implementation of FastICA based on floating-point arithmetic design for real-time blind source separation
Kuo Kai Shyu
, Ming Huan Li
電機工程學系
研究成果
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會議論文篇章
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同行評審
17
引文 斯高帕斯(Scopus)
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深入研究「FPGA implementation of FastICA based on floating-point arithmetic design for real-time blind source separation」主題。共同形成了獨特的指紋。
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Keyphrases
Blind Source Separation
100%
Fast Independent Component Analysis (FastICA)
100%
Floating-point Arithmetic
100%
Field Programmable Gate Array Implementation
100%
Field Programmable Gate Arrays
50%
Sampling Rate
50%
Array Design
50%
International Cooperative Ataxia Rating Scale (ICARS)
50%
Digital Signal Processing Techniques
50%
Non-gaussianity
50%
Kurtosis
50%
Fixed-point Design
50%
Real-time Signal Processing
50%
High Dynamic Performance
50%
Hierarchical Concept
50%
FastICA Algorithm
50%
Engineering
Field Programmable Gate Arrays
100%
Blind Signal Separation
100%
Floating Point
100%
Experimental Result
33%
Dynamic Performance
33%
Independent Source
33%
Fixed Points
33%
Independent Component Analysis
33%
Digital Signal Processing Algorithm
33%
Samplerate
33%
Computer Science
Blind Signal Separation
100%
Floating Point
100%
Field Programmable Gate Arrays
100%
Experimental Result
33%
Independent Component Analysis
33%
Fixed Points
33%
Independent Source
33%
Digital Signal Processing Algorithm
33%
Dynamic Performance
33%