Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding

Q. Y. Tong; T. H. Lee; W. J. Kim; T. Y. Tan; U. Goesele; H. M. You; W. Yun; Johnny K.O. Sin

Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding

Q. Y. Tong, T. H. Lee, W. J. Kim, T. Y. Tan, U. Goesele, H. M. You, W. Yun, Johnny K.O. Sin

機械工程學系

研究成果: 會議貢獻類型 › 會議論文 › 同行評審

16 引文斯高帕斯（Scopus）

摘要

The feasibility of using plasma enhanced chemical vapor deposition TEOS (PETEOS) oxide and associated chemical mechanical polishing (CMP)to form a flat layer on the surface of a processed VLSI bulk Si wafer for direct bonding was evaluated. Results show that the PETEOS oxide can be used to create a very strong bond after annealing at temperatures as low as 300 °C.

原文	???core.languages.en_GB???
頁面	36-37
頁數	2
出版狀態	已出版 - 1996
事件	Proceedings of the 1996 IEEE International SOI Conference - Sanibel Island, FL, USA 持續時間: 30 9月 1996 → 3 10月 1996

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	Proceedings of the 1996 IEEE International SOI Conference
城市	Sanibel Island, FL, USA
期間	30/09/96 → 3/10/96

引用此

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abstract = "The feasibility of using plasma enhanced chemical vapor deposition TEOS (PETEOS) oxide and associated chemical mechanical polishing (CMP)to form a flat layer on the surface of a processed VLSI bulk Si wafer for direct bonding was evaluated. Results show that the PETEOS oxide can be used to create a very strong bond after annealing at temperatures as low as 300 °C.",

author = "Tong, {Q. Y.} and Lee, {T. H.} and Kim, {W. J.} and Tan, {T. Y.} and U. Goesele and You, {H. M.} and W. Yun and Sin, {Johnny K.O.}",

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AU - Tong, Q. Y.

AU - Lee, T. H.

AU - Kim, W. J.

AU - Tan, T. Y.

AU - Goesele, U.

AU - You, H. M.

AU - Yun, W.

AU - Sin, Johnny K.O.

PY - 1996

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AB - The feasibility of using plasma enhanced chemical vapor deposition TEOS (PETEOS) oxide and associated chemical mechanical polishing (CMP)to form a flat layer on the surface of a processed VLSI bulk Si wafer for direct bonding was evaluated. Results show that the PETEOS oxide can be used to create a very strong bond after annealing at temperatures as low as 300 °C.

UR - http://www.scopus.com/inward/record.url?scp=0030394560&partnerID=8YFLogxK

M3 - 會議論文

AN - SCOPUS:0030394560

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T2 - Proceedings of the 1996 IEEE International SOI Conference

Y2 - 30 September 1996 through 3 October 1996

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Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding

摘要

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指紋

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