@inproceedings{a9941d74db8c461397a2b6083849d7d6,
title = "Fault Modeling and Testing of RRAM-based Computing-In Memories",
abstract = "Resistive random access memory (RRAM) is one promising nonvolatile memory. It also is a good candidate for realizing computing-in memories. In this paper, we perform fault modeling for 1T1R RRAM-based computing-in memories (CIMs). Although there are existing works reported fault modeling and testing for RRAMs and RRAM-based CIMs, they do the fault analysis based on bit-oriented array organization. Here we inject intra-cell and inter-cell electrical defects in a word-oriented cell array for the fault analysis. Fault analysis results show that a RRAM-based CIM may have computing faults and data dependent faults in addition to conventional RRAM faults. We also propose a march test March-R11N for the 1T1R RRAM-based CIMs. Analysis results show that March-R11N requires 11N test complexity to cover all the typical faults and defined faults of a 1T1R RRAM-based CIM with N words.",
keywords = "Resistive RAM, computing faults, computing-in memory, march test",
author = "Yang, {Yu Cheng} and Li, {Jin Fu}",
note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 6th IEEE International Test Conference in Asia, ITC-Asia 2022 ; Conference date: 24-08-2022 Through 26-08-2022",
year = "2022",
doi = "10.1109/ITCAsia55616.2022.00012",
language = "???core.languages.en_GB???",
series = "Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "7--12",
booktitle = "Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022",
}