Fault diagnosis for linear analog circuits

Jun Weir Lin, Chung Len Lee, Chau Chin Su, Jwu E. Chen

研究成果: 雜誌貢獻會議論文同行評審

1 引文 斯高帕斯(Scopus)

摘要

This paper presents a novel scheme to diagnose single and double faults for linear analog circuits. The scheme first proposes a simple transformation procedure to transform the tested linear analog circuit into a discrete signal flow graph, then constructs `diagnosing evaluators', which model the faulty components, to form a diagnosis configuration to diagnose the faults through digital simulation. This saves much computation time. Furthermore, a simple method to un-power the OP's is also proposed to differentiate equivalent faults. The scheme can diagnose faults in passive components as well as faults in OP's.

原文???core.languages.en_GB???
頁(從 - 到)25-30
頁數6
期刊Proceedings of the Asian Test Symposium
出版狀態已出版 - 2000
事件9th Asian Test Symposium - Taipei, Taiwan
持續時間: 4 12月 20006 12月 2000

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