To decrease the size of portable devices, this study incorporates a stacked three-dimensional integrated circuit architecture into advanced packaging techniques. The traditional FR-4 substrate was substituted with silicon interposers. Because silicon is rigid and highly resistant to deformation, this minimizes thermal stress caused by thermal expansion mismatch in the structure. This study shows that underfill applied stress to the dies when the temperature was varied, threatening the devices. Damage was most likely to occur at the die corners. The stresses were measured in situ at different temperatures using synchrotron radiation x-ray analysis. Simulation results confirm the measured data trends.