Evaluating the Impact of Fault-Tolerance Capability of Deep Neural Networks Caused by Faults

Yung Yu Tsai, Jin Fu Li

研究成果: 書貢獻/報告類型會議論文篇章同行評審

4 引文 斯高帕斯(Scopus)

摘要

Deep neural network (DNN) is one effective technique used for the artificial intelligence applications. A DNN consists of a large amount of neurons arranged in a form of multilayers. Typically, a DNN has over-provisioning neurons such that it has inherent fault-tolerance capability. However, how to evaluate the fault-tolerance capability of DNNs is a question. In this paper, we propose a simulator to estimate the loss of inference accuracy due to the faults in a DNN model or the memory faults in hardware accelerator. The simulator is implemented based on the platforms of Keras and Tensorflow. It can evaluate the fault-tolerance capability of a DNN at model and hardware levels.

原文???core.languages.en_GB???
主出版物標題Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021
編輯Gang Qu, Jinjun Xiong, Danella Zhao, Venki Muthukumar, Md Farhadur Reza, Ramalingam Sridhar
發行者IEEE Computer Society
頁面272-277
頁數6
ISBN(電子)9781665429313
DOIs
出版狀態已出版 - 2021
事件34th IEEE International System-on-Chip Conference, SOCC 2021 - Virtual, Online, United States
持續時間: 14 9月 202117 9月 2021

出版系列

名字International System on Chip Conference
2021-September
ISSN(列印)2164-1676
ISSN(電子)2164-1706

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???event.eventtypes.event.conference???34th IEEE International System-on-Chip Conference, SOCC 2021
國家/地區United States
城市Virtual, Online
期間14/09/2117/09/21

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