Equivalent Circuit Extraction of Solder Bumps Using a Single Calibration Component for Millimeter-Wave Packaging Applications

Recently, the millimeter-wave chip packaging has been a research topic of interest in the fifth generation of wireless communication [1]. The higher operating frequency causes that the parasitic effects of package structures are not negligible anymore and may deteriorate the chip performance. Shorting the electrical length of a package structure is the most straightforward approach to mitigating the packaging effect on chips. The flip-chip structure is widely used as a high-frequency interconnection because of its solder bumps, which can provide a shorter electrical signal path. Hence it is essential to develop the equivalent lumped circuit of the solder bumps. In addition, calibration must be carried out for eliminating the structure effects not induced by the bump interconnection.