Enabling union page cache to boost file access performance of NVRAM-based storage device

Shuo Han Chen, Tseng Yi Chen, Yuan Hao Chang, Hsin Wen Wei, Wei Kuan Shih

研究成果: 書貢獻/報告類型會議論文篇章同行評審

5 引文 斯高帕斯(Scopus)

摘要

Due to the fast access performance, byte-addressability, and non-volatility of non-volatile random access memory (NVRAM), NVRAM has emerged as a popular candidate for the design of memory/storage systems on mobile computing systems. For example, the latest 3D xPoint memory could be a kind of NVRAM with much longer life expectancy than NAND .ash and could ease the possible endurance issue. When NVRAM is considered as both main memory and storage in mobile computing systems, existing page cache mechanisms introduce too many unnecessary data movements between main memory and storage. To resolve this issue, we propose the concept of "union page cache," which jointly manages data of the page cache in both main memory and storage. To realize this concept, a partial page cache strategy is designed to consider both main memory and storage as its management space and to eliminate unnecessary data movements between main memory and storage without sacri.cing the data consistency of .le systems. Experimental results show that the proposed strategy can boost the .le accessing performance upto 85.62% when using PCM as a case study.

原文???core.languages.en_GB???
主出版物標題Proceedings of the 55th Annual Design Automation Conference, DAC 2018
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(列印)9781450357005
DOIs
出版狀態已出版 - 24 6月 2018
事件55th Annual Design Automation Conference, DAC 2018 - San Francisco, United States
持續時間: 24 6月 201829 6月 2018

出版系列

名字Proceedings - Design Automation Conference
Part F137710
ISSN(列印)0738-100X

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???event.eventtypes.event.conference???55th Annual Design Automation Conference, DAC 2018
國家/地區United States
城市San Francisco
期間24/06/1829/06/18

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