TY - GEN
T1 - Electrical current induced local thermal stress caused on stacked 3D-ICs
AU - Hsu, Hsueh Hsien
AU - Chang, Tao Chih
AU - Chen, Chih
AU - Lee, Hsin Yi
AU - Wu, Albert T.
PY - 2010
Y1 - 2010
N2 - For the feature of "slim and light" in portable devices, stacked 3D-IC architecture was introduced in the advanced packaging techniques. The traditional FR-4 substrate was substituted by Si substrates. In general, the thickness of Si chip and substrates would be larger than 300 micron. However, silicon is rigid and has high resistance of deformation. Therefore, the thermal stress caused by the thermal expansion mismatch between Si chip, underfill and FR-4 substrate are less important due to both the chip and substrate side are rigid silicon. However, for future applications, silicon at chip and substrate sides should be thinned. The reliability issues caused by the stress become a serious issue. Furthermore, with increasing current density in the Si chip, the local heating caused by Joule heat becomes critical. In this study, thin 3D stacked chips stressed with the current density of 1×104 A/cm2 were investigated at different temperatures by using in-situ synchrotron radiation X-ray diffraction method. Owing to high resolution of synchrotron radiation X-ray, the results showed that the local heating caused by the electrical current is obvious; it affects the stress distribution in the chips. At different temperatures, the effects become complex and the properties of underfill could seriously affect the stress state in the chips.
AB - For the feature of "slim and light" in portable devices, stacked 3D-IC architecture was introduced in the advanced packaging techniques. The traditional FR-4 substrate was substituted by Si substrates. In general, the thickness of Si chip and substrates would be larger than 300 micron. However, silicon is rigid and has high resistance of deformation. Therefore, the thermal stress caused by the thermal expansion mismatch between Si chip, underfill and FR-4 substrate are less important due to both the chip and substrate side are rigid silicon. However, for future applications, silicon at chip and substrate sides should be thinned. The reliability issues caused by the stress become a serious issue. Furthermore, with increasing current density in the Si chip, the local heating caused by Joule heat becomes critical. In this study, thin 3D stacked chips stressed with the current density of 1×104 A/cm2 were investigated at different temperatures by using in-situ synchrotron radiation X-ray diffraction method. Owing to high resolution of synchrotron radiation X-ray, the results showed that the local heating caused by the electrical current is obvious; it affects the stress distribution in the chips. At different temperatures, the effects become complex and the properties of underfill could seriously affect the stress state in the chips.
UR - http://www.scopus.com/inward/record.url?scp=79951665472&partnerID=8YFLogxK
U2 - 10.1109/IMPACT.2010.5699582
DO - 10.1109/IMPACT.2010.5699582
M3 - 會議論文篇章
AN - SCOPUS:79951665472
SN - 9781424497836
T3 - International Microsystems Packaging Assembly and Circuits Technology Conference, IMPACT 2010 and International 3D IC Conference, Proceedings
BT - International Microsystems Packaging Assembly and Circuits Technology Conference, IMPACT 2010 and International 3D IC Conference, Proceedings
T2 - 2010 5th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2010 and International 3D IC Conference
Y2 - 20 October 2010 through 22 October 2010
ER -