Efficient built-In self-test for video coding cores: A case study on motion estimation computing array

Yu Sheng Huang, Kai Chen, Chun Lung Hsu

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

Motion estimation algorithms are used in various video coding systems. With the advent of VLSI technology, a large collection of processing elements can be assembled to achieve high-speed computation economically. Rather, the problem of testing a VLSI chip begins with introduction of a defect during the design or implementation phases. Therefore, this paper describes a novel testing scheme of motion estimation. The key part of this scheme is to offer high reliability for motion estimation architecture. The experimental result shows the design achieve 100% fault coverage. And, the main advantages of this scheme are minimal performance degradation, small cost of hardware overhead and the benefit of at-speed testing.

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主出版物標題Proceedings of APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
頁面1751-1754
頁數4
DOIs
出版狀態已出版 - 2008
事件APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems - Macao, China
持續時間: 30 11月 20083 12月 2008

出版系列

名字IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

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???event.eventtypes.event.conference???APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
國家/地區China
城市Macao
期間30/11/083/12/08

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