摘要
This paper describes a digitally controlled automatic gain control (AGC) subsystem for the analog front-end (AFE) supporting the digital video broadcasting in DZIF (double conversion with zero second IF) architecture. The receive path contains a programmable-gain amplifier (PGA) with self-tuning gain circuit. The dynamic range of the PGA is 51 dB controlled by a digital loop to form a first order control system. The third-harmonic distortion is less than -60 dB for differential input signal up to 160 mVpp. The supply voltage used is 1.8 V and the power consumption of designed chip is 13 mW. The nonlinearity of the proposed design verified by HSPICE post-layout simulation is better than -60 dB at every MOS corner, which is suffcient for the system specification. This chip is fabricated on TSMC's standard 0.18 m 1P6M CMOS technology.
原文 | ???core.languages.en_GB??? |
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頁(從 - 到) | 109-113 |
頁數 | 5 |
期刊 | WSEAS Transactions on Electronics |
卷 | 10 |
出版狀態 | 已出版 - 2019 |