Design of high-performance and highly reliable nMOSFETs with embedded Si:C S/D extension stressor(Si:C S/D-E)

Steve S. Chung; E. R. Hsieh; P. W. Liu; W. T. Chiang; S. H. Tsai; T. L. Tsai; R. M. Huang; C. H. Tsai; W. Y. Teng; C. I. Li; T. F. Kuo; Y. R. Wang; C. L. Yang; C. T. Tsai; G. H. Ma; S. C. Chien; S. W. Sun

Design of high-performance and highly reliable nMOSFETs with embedded Si:C S/D extension stressor(Si:C S/D-E)

Steve S. Chung
, E. R. Hsieh
, P. W. Liu
, W. T. Chiang
, S. H. Tsai
, T. L. Tsai
, R. M. Huang
, C. H. Tsai
, W. Y. Teng
, C. I. Li
, T. F. Kuo
, Y. R. Wang
, C. L. Yang
, C. T. Tsai
, G. H. Ma
, S. C. Chien
, S. W. Sun

電機工程學系

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

7 引文斯高帕斯（Scopus）

摘要

A Novel strained nMOSFET with embedded Si:C in S/D extension stressor (Si:C S/D-E) was presented. Comparing to the bulk device, it revealed good drive current I_ON (+27%), high I_D,sat current (+67%), enhanced channel mobility (+105%), at a lower effective substitutional carbon concentration (C%=1.1%), using the poly-gate 40nm-node Si:C/eSiGe S/D CMOS technology. Moreover, PBTI effect was first observed in this device as a result of Carbn impurity out-diffusion, which is of critically important for the design trade-off between performance and reliability.

原文	???core.languages.en_GB???
主出版物標題	2009 Symposium on VLSI Technology, VLSIT 2009
頁面	158-159
頁數	2
出版狀態	已出版 - 2009
事件	2009 Symposium on VLSI Technology, VLSIT 2009 - Kyoto, Japan 持續時間: 16 6月 2009 → 18 6月 2009

出版系列

名字	Digest of Technical Papers - Symposium on VLSI Technology
ISSN（列印）	0743-1562

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???event.eventtypes.event.conference???	2009 Symposium on VLSI Technology, VLSIT 2009
國家/地區	Japan
城市	Kyoto
期間	16/06/09 → 18/06/09

引用此

Chung, S. S., Hsieh, E. R., Liu, P. W., Chiang, W. T., Tsai, S. H., Tsai, T. L., Huang, R. M., Tsai, C. H., Teng, W. Y., Li, C. I., Kuo, T. F., Wang, Y. R., Yang, C. L., Tsai, C. T., Ma, G. H., Chien, S. C., & Sun, S. W. (2009). Design of high-performance and highly reliable nMOSFETs with embedded Si:C S/D extension stressor(Si:C S/D-E). 於 2009 Symposium on VLSI Technology, VLSIT 2009 (頁 158-159). 文章 05200671 (Digest of Technical Papers - Symposium on VLSI Technology).

@inproceedings{c5af34866ca047d292a8a87b9dae6bc1,

title = "Design of high-performance and highly reliable nMOSFETs with embedded Si:C S/D extension stressor(Si:C S/D-E)",

abstract = "A Novel strained nMOSFET with embedded Si:C in S/D extension stressor (Si:C S/D-E) was presented. Comparing to the bulk device, it revealed good drive current ION (+27\%), high ID,sat current (+67\%), enhanced channel mobility (+105\%), at a lower effective substitutional carbon concentration (C\%=1.1\%), using the poly-gate 40nm-node Si:C/eSiGe S/D CMOS technology. Moreover, PBTI effect was first observed in this device as a result of Carbn impurity out-diffusion, which is of critically important for the design trade-off between performance and reliability.",

keywords = "CMOS, Embedded SiC, Positive temperature bias instability, Strained technology",

author = "Chung, \{Steve S.\} and Hsieh, \{E. R.\} and Liu, \{P. W.\} and Chiang, \{W. T.\} and Tsai, \{S. H.\} and Tsai, \{T. L.\} and Huang, \{R. M.\} and Tsai, \{C. H.\} and Teng, \{W. Y.\} and Li, \{C. I.\} and Kuo, \{T. F.\} and Wang, \{Y. R.\} and Yang, \{C. L.\} and Tsai, \{C. T.\} and Ma, \{G. H.\} and Chien, \{S. C.\} and Sun, \{S. W.\}",

year = "2009",

language = "???core.languages.en\_GB???",

isbn = "9784863480094",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

pages = "158--159",

booktitle = "2009 Symposium on VLSI Technology, VLSIT 2009",

note = "2009 Symposium on VLSI Technology, VLSIT 2009 ; Conference date: 16-06-2009 Through 18-06-2009",

}

Chung, SS, Hsieh, ER, Liu, PW, Chiang, WT, Tsai, SH, Tsai, TL, Huang, RM, Tsai, CH, Teng, WY, Li, CI, Kuo, TF, Wang, YR, Yang, CL, Tsai, CT, Ma, GH, Chien, SC & Sun, SW 2009, Design of high-performance and highly reliable nMOSFETs with embedded Si:C S/D extension stressor(Si:C S/D-E). 於 2009 Symposium on VLSI Technology, VLSIT 2009., 05200671, Digest of Technical Papers - Symposium on VLSI Technology, 頁 158-159, 2009 Symposium on VLSI Technology, VLSIT 2009, Kyoto, Japan, 16/06/09.

TY - GEN

T1 - Design of high-performance and highly reliable nMOSFETs with embedded Si:C S/D extension stressor(Si:C S/D-E)

AU - Chung, Steve S.

AU - Hsieh, E. R.

AU - Liu, P. W.

AU - Chiang, W. T.

AU - Tsai, S. H.

AU - Tsai, T. L.

AU - Huang, R. M.

AU - Tsai, C. H.

AU - Teng, W. Y.

AU - Li, C. I.

AU - Kuo, T. F.

AU - Wang, Y. R.

AU - Yang, C. L.

AU - Tsai, C. T.

AU - Ma, G. H.

AU - Chien, S. C.

AU - Sun, S. W.

PY - 2009

Y1 - 2009

N2 - A Novel strained nMOSFET with embedded Si:C in S/D extension stressor (Si:C S/D-E) was presented. Comparing to the bulk device, it revealed good drive current ION (+27%), high ID,sat current (+67%), enhanced channel mobility (+105%), at a lower effective substitutional carbon concentration (C%=1.1%), using the poly-gate 40nm-node Si:C/eSiGe S/D CMOS technology. Moreover, PBTI effect was first observed in this device as a result of Carbn impurity out-diffusion, which is of critically important for the design trade-off between performance and reliability.

AB - A Novel strained nMOSFET with embedded Si:C in S/D extension stressor (Si:C S/D-E) was presented. Comparing to the bulk device, it revealed good drive current ION (+27%), high ID,sat current (+67%), enhanced channel mobility (+105%), at a lower effective substitutional carbon concentration (C%=1.1%), using the poly-gate 40nm-node Si:C/eSiGe S/D CMOS technology. Moreover, PBTI effect was first observed in this device as a result of Carbn impurity out-diffusion, which is of critically important for the design trade-off between performance and reliability.

KW - CMOS

KW - Embedded SiC

KW - Positive temperature bias instability

KW - Strained technology

UR - https://www.scopus.com/pages/publications/71049152418

M3 - 會議論文篇章

AN - SCOPUS:71049152418

SN - 9784863480094

T3 - Digest of Technical Papers - Symposium on VLSI Technology

SP - 158

EP - 159

BT - 2009 Symposium on VLSI Technology, VLSIT 2009

T2 - 2009 Symposium on VLSI Technology, VLSIT 2009

Y2 - 16 June 2009 through 18 June 2009

ER -

Design of high-performance and highly reliable nMOSFETs with embedded Si:C S/D extension stressor(Si:C S/D-E)

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