Design of direct digital frequency synthesizer with high ROM compression ratio

Li Wen Hsu, Dah Chung Chang

研究成果: 書貢獻/報告類型會議論文篇章同行評審

1 引文 斯高帕斯(Scopus)

摘要

A new ROM size reduction technique for direct digital frequency synthesizers (DDFS's) is proposed in this paper. In the new technique, a multiple-segment piecewise polynomial function g(x) is determined for the sinusoidal ROM table which stores the values of sin(πx/2) - g(x) instead of sin(πx/2). With use of the proposed three-segment technique for 20-bit phase to II-bit amplitude mapping, the number of ROM output bits and ROM size are reduced by 5 and 98.58%, respectively, compared to the quarter sine wave technique with comparable spectral purity. The compression ratio of the proposed technique is about 70:1. This new design can gain low power and small chip area, especially for high frequency resolution applications.

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主出版物標題Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
DOIs
出版狀態已出版 - 2005
事件12th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2005 - Gammarth, Tunisia
持續時間: 11 12月 200514 12月 2005

出版系列

名字Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

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???event.eventtypes.event.conference???12th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2005
國家/地區Tunisia
城市Gammarth
期間11/12/0514/12/05

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