Design of broadband highly linear IQ modulator using a 0.5 μm E/D-PHEMT process for millimeter-wave applications

研究成果: 雜誌貢獻期刊論文同行評審

2 引文 斯高帕斯(Scopus)

摘要

A broadband highly linear IQ modulator using a 0.5-μm enhancement/depletion-pseudomorphic high-electron mobility transistor process is presented in this letter. An innovative broadside/edge coupler is proposed to apply to the IQ modulator. The chip size is only 1 × 1 mm2, including radio frequency and baseband PADs. The sideband and local oscillation suppressions of the modulator are better than -33 and -15 dBc, respectively. At a carrier frequency of 60 GHz with a 64 quadrature amplitude modulation (QAM) modulation, the modulator demonstrates an error vector magnitude of within 3%, and an adjacent channel power ratio of better than -40 dBc. To the best of the authors' knowledge, this work demonstrates the best modulation quality with a 64 QAM modulation up to 60 GHz among all the reported reflection-type IQ modulators.

原文???core.languages.en_GB???
文章編號4538235
頁(從 - 到)491-493
頁數3
期刊IEEE Microwave and Wireless Components Letters
18
發行號7
DOIs
出版狀態已出版 - 7月 2008

指紋

深入研究「Design of broadband highly linear IQ modulator using a 0.5 μm E/D-PHEMT process for millimeter-wave applications」主題。共同形成了獨特的指紋。

引用此