Design of an SVD engine for 8×8 MIMO precoding systems

Chun Hun Wu, Chin Yi Liu, Pei Yun Tsai

研究成果: 書貢獻/報告類型會議論文篇章同行評審

4 引文 斯高帕斯(Scopus)

摘要

A singular-value-decomposition (SVD) engine for 8×8 MIMO precoding systems is designed and implemented. The memory-based architecture is adopted with eight processing elements, each having two CORDIC modules. Two-phase operations are performed including bidiagonalization and Golub-Reinsch SVD (GR-SVD) with Rayleigh quotient shift. The split, deflation, and shift techniques of GR-SVD can effectively decrease the processed matrix size and accelerate the diagonalization to enhance the throughput. To cover the wide distribution of singular vector elements and singular values derived from 8 × 8 MIMO channel matrix, hybrid datapath representations are used. The thresholds for split and deflation can be adjusted and thus the accuracy of the SVD engine is variable according to the requirements. From the synthesis results, the SVD engine in 45nm CMOS technology is able to provide the throughput rate of 636K matrix/s and outperforms the previous design.

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主出版物標題IEEE International Symposium on Circuits and Systems
主出版物子標題From Dreams to Innovation, ISCAS 2017 - Conference Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781467368520
DOIs
出版狀態已出版 - 25 9月 2017
事件50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States
持續時間: 28 5月 201731 5月 2017

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

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???event.eventtypes.event.conference???50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
國家/地區United States
城市Baltimore
期間28/05/1731/05/17

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