Design of an Internal Asynchronous 11-Bit SAR ADC for Biomedical Wearable Application

This paper introduces a fully differential asynchronous successive approximation register analog-to-digital converter (SAR ADC) designed for biomedical signal processing. By extending the tracking time and utilizing fully differential inputs in the analog front-end circuit, the signal-to-noise ratio is enhanced in the system. Using an asynchronous clock can reduce power consumption across a wider range of sampling frequencies. In comparison to conventional architecture in high-speed SAR ADC, using an internal clock generator can operate at lower frequencies. A fully differential input can eliminate the DC offset of the analog front-end circuit and reduce the adverse effects of process variation, voltage variation, and temperature variation. The chip is implemented by TSMC 0.18 (Formula presented.) m complementary metal-oxide-semiconductor (CMOS) technology, and the chip area is 0.680 mm² (including ESD I/O PAD). At a 1.2 V supply, the maximum sampling rate is 10 Kilo Samples per second (KSps). The implemented ADC has an 11-bit resolution, while the input voltage range is 300∼900 mV. The total power consumption is 1.7 (Formula presented.) W, with the core power consumption at 932 nW.