Design of a tunable block floating-point quantizer with fractional exponent

Pei Yun Tsai, Tien I. Yang, Ching Horng Lee, Li Mei Chen, Sz Yuan Lee

研究成果: 書貢獻/報告類型會議論文篇章同行評審

1 引文 斯高帕斯(Scopus)

摘要

For the conventional block floating-point quantizer (BFPQ), usually a large block size causes performance degradation and thus small block sizes are preferred, especially when non-uniformly distributed signals are processed. A tunable BFPQ with fractional exponent is proposed in this paper to deal with the problem. We first examine the root cause of degradation through analytic equations and then propose to tune the thresholds for deriving the exponent and fractional exponent of the block so as to strike a good balance between the quantization error and saturation error. An optimal tuning value depending on the block size and mantissa word-length can be obtained. Thus, the tunable BFPQ can achieve better output signal-to-quantization-noise ratio (SQNR) in a wide dynamic range. The analytic equation for the output SQNR of the proposed BFPQ is derived to verify the simulated results. Only one extra multiplication is required for each block to implement the tunable BFPQ. Finally, we show the obvious SQNR improvements compared to the conventional scheme for various settings of block sizes and mantissa word-lengths.

原文???core.languages.en_GB???
主出版物標題2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781728103976
DOIs
出版狀態已出版 - 2019
事件2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan
持續時間: 26 5月 201929 5月 2019

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
2019-May
ISSN(列印)0271-4310

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???event.eventtypes.event.conference???2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
國家/地區Japan
城市Sapporo
期間26/05/1929/05/19

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